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Showing posts from October, 2019

COMPUTER ARCHITECTURE AND HARDWARE MAINTENANCE

COMPUTER ARCHITECTURE AND HARDWARE MAINTENANCE:- CPU ORGANIZATION:- Generally CPU has seven general registers.   Register organization show how registers are selected and how data flow between register and ALU.   A decoder is used to select a particular register.The output of each register is connected to two multiplexers to form the two buses A and B. The selection lines in each multiplexer select the input data for the particular bus. The A and B buses form the two inputs of an ALU.The operation select lines decide the micro operation to be performed by ALU. The result of the micro operation is available at the output bus. The output bus connected to the inputs of all registers, thus by selecting a destination register it is possible to store the result in it. A bus organization for seven CPU register To perform the operation  R3 = R1+R2   We have to provide the following binary selection variable to the select inputs. EXAMPLE: SEL A  :   001  -To place the contents o